# BFEXTU Instruction

This instruction will extract a bit field from the specified effective address, zero extend to 32 bits, and load the result into the destination data register. The condition codes are set according to the value in the field before the change.
ADDRESS METHODS: Dn, (An), x(An), x(An,xr.s), x.w, x.l, x(PC), x(PC,xr.s)
DATA LENGTH: Unsized

FLAGS: | X - Not affected
N - Set if the most significant bit of the field is set. Cleared otherwise.
Z - Set if all bits of the field are zero. Cleared otherwise.
V - Always cleared.
C - Always cleared.

SYNTAX: | BFEXTU <ea>{offset:width},Dn

The field selection is specified by a field offset and field width. The field offset denotes the starting bit of the field.. The field width determines the number of bits to be included in the field. The offset and width fields may be specified with an immediate operand ('#' is optional) or a data register. If the offset is an immediate operand the value must be in the range 0-31. If the offset is a data register the value is in the range -231 to 231-1. If the width is an immediate operand the value is in the range 1-31 or 0 to specify a width of 32. If the width is a data register the value is taken modulo 32, with values 1-31 or 0 to specify a width of 32. Bit 0 is the most significant bit.

BFEXTU $1000{D0,D1},D2 extracts the bits from $1000 bit D0 through $1000 bit (D0 + D1) and loads them into D2