Hi,
I've been trying to test some code I've found that is designed to test for each of the valid 680x0 cpu and fpu types. The code i'm testing is listed below.
The problem I'm having is Sim68k is indicating that it's a "68040" cpu, however it returns "NONE" for the FPU.
If Sim68k is in fact meant to be a 68000 then the MOVEC VBR, D3 (dc.w $4E7A, $3801) should cause an exception, but it doesn't. The assembler won't compile a MOVEC VBR,D3 instruction which indicates that EASy68k is meant to be a 68000.
Code:
*-----------------------------------------------------------
* Title :
* Written by :
* Date :
* Description:
*-----------------------------------------------------------
CPUConsole EQU $00FC0400 * In-Memory Console Buffer.
FPUConsole EQU $00FC0410 * In-Memory Console Buffer.
ORG $1000
START: ; first instruction of program
* Put program code here
moveq #$30,D1 * 68000 processor.
moveq #$10,D2
move.l D2,A1
move.l (A1),D2 * vector exception No. 4 (Illegal Instruction), which occurs when the processor.
* encounters an unsupported code instruction (valid only for 68000).
lea CPUmodel1(pc),A0
move.l A0,(A1) * change the vector exception No. 4 (valid only for 68000).
move.l A7,A3 * storing the stack pointer (A7 = SSP).
dc.w $4E7A, $3801 * MOVEC VBR, D3 - user moves the registry value VBR to register D3.
* Only on the 68000 processor causes an exception to No. 4.
* At this point, the processor is a 68010 or higher.
move.l D2,(A1) * the restoration of the exception vector 4 (valid only 68000).
add.l D3,A1
move.l (A1),D2 * vector exception No. 4 (valid for 68010+).
lea CPUmodel3(pc),A0
move.l A0,(A1) * exception vector modification # 4.
move.l D3,A2
moveq #$2C,D3
add.l D3,A2
move.l (A2),D3 * exception vector # 11 (line 1111 Emulator) which occurs when the processor.
* encounters an unsupported instruction code, beginning with the word $ Fnnn.
lea CPUmodel0(pc),A0
move.l A0,(A2) * the change vector exceptions No. 11.
moveq #$31,D1 * 68010 processor.
dc.w $4E7A, $1002 * MOVEC CACR, D1 - instruction supported by 68020/30/40/60.
moveq #$32,D1 * processor 68020/68030.
dc.w $4E7A, $1004 * MOVEC ITT0, D1 - instruction supported by 68040/60.
* Moves registry value ITT0 (68040, 68LC040, 68060,
* 68EC060, 68LC060) / IACR0 (68EC040) to the register D1.
moveq #$34,D1 * processor 68040.
dc.w $4E7A, $1808 * MOVEC PCR D1 - instruction supported by 68060.
moveq #$36,D1 * processor 68060.
CPUmodel0: * handling code exception No. 11 (only for 68020).
move.l D3,(A2) * the restoration of the vector exception 11.
CPUmodel1: * exception handling code No. 4 (only for 68000).
move.l D2,(A1) * restoration of the vector exception No. 4.
move.l A3,A7 * restore the stack pointer (A7 = SSP).
lea CPUConsole,A0 * the address data output.
lea CPUmodel4(pc),A1
move.b D1,3(A1) * value determines the processor model: $ 30- $ 36 = 68000-68060.
CPUmodel2:
move.b (A1)+,(A0)+
bne.s CPUmodel2
jmp FPUModel
CPUmodel3: * exception handling code No. 4.
cmp.b #$32,D1
bne.s CPUmodel0
* Recognition processor 68020/68030.
dc.w $F02F, $6200, $FFFE * PMOVE.W PSR, -2 (A7) - user pushes on the stack (A7 = SSP).
* Registry value MMUSR (68030) / ACUSR (68EC030).
* The 68020 processor causes an exception 11.
moveq #$33,D1 * 68030 processor.
bra.s CPUmodel0
CPUmodel4:
dc.b '680x0', 0
FPUmodel:
* I assume that at this point the CPU is operating in supervisor mode.
* Each 680x0 processor is in this mode, as soon as you turn on / reset the system.
clr.l D1
moveq #$10,D2
move.l D2,A1
move.l (A1),D2 * vector exception No. 4 (Illegal Instruction), which occurs when the processor.
* encounters an unsupported code instruction (valid only for 68000).
lea FPUmodel0(pc),A0
move.l A0,(A1) * exception vector modification 4 (valid only 68000).
moveq #$2C,D3
move.l D3,A2
move.l (A2),D3 * exception vector # 11 (line 1111 Emulator) which occurs when the processor.
* Encounters an unsupported instruction code, beginning with the word $ Fnnn.
* (only valid for 68000).
lea FPUmodel1(pc),A4
move.l A4,(A2) * the change vector exceptions No. 11 (valid only for 68000).
move.l A7,A3 * storing the stack pointer (A7 = SSP).
dc.w $4E7A, $1801 * MOVEC VBR, D1 - user moves the registry value VBR to the register D1.
* Only on the 68000 processor causes an exception to No. 4.
* At this point, the processor is a 68010 or higher.
move.l D2,(A1) * the restoration of the exception vector 4 (valid only 68000).
move.l D3,(A2) * the restoration of the exception vector # 11 (valid only 68000).
add.l D1,A1
add.l D1,A2
move.l (A1),D2 * exception vector 4 (valid for 68010+).
move.l (A2),D3 * exception vector # 11 (valid for 68010+).
move.l A0,(A1) * the exception update vector 4.
move.l A4,(A2) * the change vector exceptions No. 11.
FPUmodel0: * exception handling code No. 4 (only for 68000).
moveq #$00,D1 * no coprocessor.
dc.w $F201, $583A * FTST.B D1 - manual tests the youngest byte in the register D1 processor.
* (NULL prevents the generation of the frame by the statement FSAVE).
* If you have not installed FPU, causing an exception 11.
dc.w $F327 * FSAVE - (A7) - user pushes on the stack (A7 = SSP) border with the state of FPU.
move.l A3,D4
sub.l A7,D4 * frame size hook by the instruction FSAVE.
moveq #$05,D1 * 68881 coprocessor.
cmp.b #$1C,D4 * frame IDLE.
beq.s FPUmodel1
moveq #11,D1 * 68882 coprocessor.
cmp.b #$3C,D4 * frame IDLE.
beq.s FPUmodel1
moveq #17,D1 * coprocessor built into the 68040.
cmp.b #4,D4 * frame IDLE.
beq.s FPUmodel1
moveq #23,D1 * coprocessor built into the 68060.
FPUmodel1: * exception handling code No. 11 (only if no FPU).
move.l D2,(A1) * the restoration of the exception vector 4.
move.l D3,(A2) * the restoration of the exception vector 11.
move.l A3,A7 * restore the stack pointer (SSP = A7 ).
lea FPUConsole,A0 * the address data output.
lea FPUmodel3(pc),A1
add.l D1,A1 * value determines the FPU model: 0 = none, 5 = 68881 11 = 68882, 68040 = 17, 23 = 68060.
FPUmodel2:
move.b (A1)+,(A0)+
bne.s FPUmodel2
Simhalt
FPUmodel3:
dc.b 'NONE', 0
dc.b '68881', 0
dc.b '68882', 0
dc.b 'IN040', 0
dc.b 'IN060', 0
* Put variables and constants here
END START ; last line of source
Thanks
Ken.