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Incorrect Scc cycle count
http://www.easy68k.com/EASy68Kforum/viewtopic.php?f=8&t=1536
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Author:  marhel [ Thu Feb 18, 2016 9:19 pm ]
Post subject:  Incorrect Scc cycle count

The M68000UM says that the Scc instructions on a register destination consume 6 or 4 instructions, depending on if the condition was true or false, while a memory destination always consume 8 cycles.

The SCC implementation in CODE8.CPP seemingly implements this;

Code:
  if (inst & 0x0030 == 0)
    inc_cyc (check_condition (condition) ? 6 : 4);
  else
    inc_cyc (8);

but the simulator always reports 8 cycles. This is due to a subtle bug: the fact that == is evaluated before &, making the expression always evaluate to false (and 8 cycles) - the expression need an extra pair of parens:

Code:
  if ( (inst & 0x0030) == 0)
    inc_cyc (check_condition (condition) ? 6 : 4);
  else
    inc_cyc (8);

Author:  profkelly [ Fri Feb 19, 2016 12:22 pm ]
Post subject:  Re: Incorrect Scc cycle count

I love bug reports that provide the solution :happy2

Thanks for the extra effort.

Author:  profkelly [ Fri Mar 09, 2018 12:41 pm ]
Post subject:  Re: Incorrect Scc cycle count

Corrected in v5.16.0. Thanks again for providing the solution.

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