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 Post subject: PDP-8 emulator
PostPosted: Fri Jul 27, 2007 1:52 pm 

Joined: Fri Jul 20, 2007 12:33 pm
Posts: 8
Location: England
I've been working at 68k assembly on and off for about a week now, and have come up with something that runs PDP-8 code fairly well. Loads of things are still missing, and I haven't tested that every opcode I have added works, but ...
For those that don't know (maybe most of you :) ), the PDP-8 was one of the first minicomputers, from 1965 I think, made by DEC with a 12-bit wordlength. They say it's the perfect choice for anyone who wants to write an emulator and who don't have much experience in programming :) so maybe one day this project will grow into a fully-fledged emulator...

So here's the source, enjoy.

START   ORG   $1000
*************************************************************** INTERRUPTS ****
INTER   bclr   #$0,d7      deal with interrupts.
   beq   INT2
INT1   addq.w   #$2,a0      Interrupt mode 1. Skip next instruction.
INT2   bclr   #$1,d7      Interrupt mode 2. Execute a JMS 0000 instruction.
   beq   INT3
   move.w   #$0800,d0
   jmp   OPPARSE      
INT3   bclr   #$3,d7      Interrupt mode 3. Execute the command in r11.
   beq   INT4
   move   #$0800,d0
   jmp   OPPARSE
INT4   jmp   OPFETCH      Nothing happens. Just continue with the program.
************************************************************* FETCH OPCODE ****
OPFETCH   move.w   (a0)+,d0      get opcode. Inc PC
************************************************************ PARSE ADDRESS ****
ADPARSE   move.w   d0,d2
   lsl.w   #$1,d2      adress by byte, not word.
   andi.w   #$01FF,d2      work out effective adress.
   bclr   #$8,d2      check if zero page.
   beq   DIRECTION      that's what we have now, so check direction.
   move.w   a0,d4      otherwise, get page from left 5 bits of PC
   andi.w   #$0F800,d4
   or.w   d4,d2      that should do it
DIRECTION   move.w   d2,a1
   btst   #$8,d0      indirect?
   beq   OPPARSE
INDIRECT   move.w   d2,a2      now calculate effective adress
   move.w   (a2),d2
   lsl.w   #$1,d2      of course we need to adress by byte, not word.
   move.w   d2,a1
   cmpi.w   #$8,d2      autoinc reg?
   blt   OPPARSE
   cmpi.w   #$F,d2
   bgt   OPPARSE
   move   d2,a2      add 1 to this register.
   addq.w   #$1,(a2)
**************************************************** INVOKE OPCODE ROUTINE ****
OPPARSE   move.w   d0,d2      d2 will hold command for now
   lsr   #$8,d2
   lsr   #$1,d2
   andi.w   #$0007,d2
   cmpi   #$0007,d2      which command have we got here?
   beq   OPS1
   cmpi   #$0006,d2
   beq   IOTOP
   cmpi   #$0005,d2
   beq   JMPOP
   cmpi   #$0004,d2
   beq   JMSOP
   cmpi   #$0003,d2
   beq   DCAOP
   cmpi   #$0002,d2
   beq   ISZOP
   cmpi   #$0001,d2
   beq   TADOP
ANDOP   move.w   (a1),d2      AND operand to register
   and.w   d2,d1
   jmp   INTER
TADOP   add.w   (a1),d1      TAD - add operand to register
   jmp   INTER
ISZOP   move.w   (a1),d2      ISZ - increment operand by 1. Skip next instruction if it overflows to 0
   addq.w   #$1,d2
   andi.w   #$0fff,d2
   bne   NOSKIP
   bset   #$0,d7      set skip flag
NOSKIP   andi.w   #$f000,(a1)      rightmost twelve bits will always be 0 in this case
   or.w   d2,(a1)
   jmp   INTER
DCAOP   move.w   d1,(a1)      DCA - deposit and clear accumulator
   move.w   #$0,d1
   jmp   INTER
JMSOP   move.w   a0,(a1)+      JMS - store PC at word
   move.w   a1,a0      and continue execution from the following word
   addq   #$2,a0      execute next command after that.
   jmp   OPFETCH      in this case, don't allow an interrupt to be dealt with till next round
JMPOP   move.w   a1,a0      JMP - jump
   jmp   INTER
IOTOP   move   d0,d2      IOT - input output transfers.
   andi.w   #$8F,d2      put port and signal into d2 - 7 bits
   cmpi   #$0E,d2
   jmp   INTER
************************************************** MICROCODED OPERATIONS I ****
OPS1   btst   #$8,d0      OPR - micrcoded operations.
   bne   OPS2
OPS1CLA   btst   #$7,d0      CLA - clear AC
   bne   OPS1CLL
   andi.w   #$F000,d1
OPS1CLL   btst   #$6,d0      CLL - clear Link
   bne   OPS1CMA
   andi.w   #$0FFF,d1
OPS1CMA   btst   #$5,d0      CMA - one's complement AC
   bne   OPS1CML
   eori.w   #$0FFF,d1
OPS1CML   btst   #$4,d0      CML - one's complement Link
   bne   OPS1IAC
   eori.w   #$F000,d1
OPS1IAC   btst   #$0,d0      IAC - increment AC
   bne   OPS1BSW6
   addq.w   #$1,d1
OPS1BSW6   btst   #$2,d0      See what's to be done next.
   bne   OPS1RAL
   btst   #$3,d0
   bne   OPS1RAR
   btst   #$1,d0
   beq   EPILOGUE
   move.w   #$d1,d2      BSW6 - swap rightmost 6 bits of register.
   rol.w   #$2,d2      do this in d2
   ror.b   #$2,d2
   rol.w   #$8,d2
   rol.b   #$2,d2
   ror.w   #$2,d2
   andi.w   #$000f,d2      keep the link bits. these are still intact in d1
   andi.w   #$f000,d1
   or.w   d2,d1
   jmp   EPILOGUE
OPS1RAL   btst   #$3,d0
   bne   OPS1BSW8
   rol   #$1,d1      RAL - Rotate register left
   btst   #$1,d0
   beq   EPILOGUE
   rol   #$1,d1
   jmp   EPILOGUE
OPS1RAR   ror   #$1,d1      RAL - Rotate L,AC left
   btst   #$1,d0
   beq   EPILOGUE
   ror   #$1,d1
   jmp   EPILOGUE
OPS1BSW8   ror.w   #$8,d1      BSW - swap 8 bit bytes in AC.
   jmp   EPILOGUE
************************************************* MICROCODED OPERATIONS II ****
OPS2   btst   #$3,d0                           *OR SKIPS*
   bne   OPS2SKP
OPS2SMA   btst   #$6,d0      SMA - skip if reg<0
   beq   OPS2SZA
   btst   #$b,d1
   beq   OPS2SZA
   bset   #$0,d7
OPS2SZA   btst   #$5,d0      SZA - skip is reg=0
   beq   OPS2SNL
   move   #$d1,d4      will set flag Z accordingly
   beq   OPS2SNL
   bset   #$0,d7
OPS2SNL   btst   #$4,d0      SNL - skip if L<>0
   move   #$d1,d4
   andi.w   #$F000,d4
   beq   OPS2CLA
   bset   #$0,d7
   jmp   OPS2CLA
OPS2SKP   bset   #$0,d7                          *AND SKIPS*
   btst   #$6,d0      SKP - unconditional skip
   beq   OPS2SZL      SPA - skip if reg>0
   btst   #$b,d1
   bne   OPS2SZL
   bclr   #$0,d7
   bra   OPS2CLA
OPS2SZL   nop ***************      SZL - skip if L=0 - fill this in later
OPS2CLA   nop
***************************************************************** EPILOGUE ****


Fewer bicycles going rusty at the bottom of lakes,
More in everyday use. Go green!

 Post subject:
PostPosted: Wed Aug 06, 2008 1:45 pm 

Joined: Mon Dec 27, 2004 11:40 pm
Posts: 318
I made one too and put it here.

I can find diagnostic programs for the PDP-8 but they're all in paper tape format. I have no idea yet how co convert these into a raw binary image that could then be assembled into the simulated memory.

So until I do there's only a "hello world!" program.


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